THE DESIGN OF A LOW NOISE VCO WITH INNOVATIVE HARMONIC FILTERING RESISTOR By LE WANG A thesis submitted in partial fulfillment of the requirements for the degree of MASTER OF SCIENCE IN ELECTRICAL ENGINEERING
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by Le Wang, M.S. Washington State University August 2006 Chair: Deukhyoun Heo This thesis presents a novel low power and low phase noise 0.18-μm CMOS LC voltage controlled oscillator(VCO) for 5 GHz Industrial Scientific Medical (ISM) band. Using a new harmonic filtering technique the phase noise of CMOS LC voltage-controlled oscillator (VCO) is lowered based on the loaded-Q improvement approach. A single resistor was used at the drain node of the bias transistor instead of extra inductors and capacitors. The wide-band nature of resistance can suppress the second harmonic as well as other even harmonics leaking from the LC tank across the full period of oscillation, thus preserve the loaded quality factor of the LC tank. As a proof of concept, a completely integrated 5.3GHz all PMOS LC VCO was implemented in a 0.18-μm BiCMOS process. Simulation Result shows the achieved phase noise of -126.5 dBc/Hz at 1-MHz offset and -105.7 dBc/Hz at 100-KHz offset and -83.45 dBc/Hz at 10-KHz offset while the VCO core draws 5mA from a 1.8V supply. The VCO takes up less than 0.5mm of silicon real estate including test die pads. This work also gives an analysis of phase noise problem in CMOS LC VCO and the physical mechanism of passive components such as integrated inductor and capacitors which is related with phase noise problem in the VCO.
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تاریخ انتشار 2006